IEEE

FPGA-based Matrix Keyboard Common IP Core Design and the Implementation Using Verilog HDL

Abstract: A common IP core design of FPGA-based matrix keyboard is introduced. The design uses Verilog HDL and Altera's Cyclone II series FPGA-EP2C5T144 chip as carrier to achieve the matrix keys ...
IEEE

FPGA based real-time underground mine environment monitoring and warning system

Abstract: This paper presents the system design of a real-time underground mine environment monitoring and warning system using FPGA. This system detects the presence of harmful and toxic gases like ...
Electronics For You

JOB: Senior ASIC Verification Engineer At NVIDIA In Bengaluru

We’re seeking an elite Senior Verification Engineer to verify the design and implementation of the next generation of IST IPs ...
GitHub

memory-controller

This is not Linux kernel maintainer's tree, but an open-source work in progress. Officially maintained repositories are under kernel.org (Samsung SoC, memory controller drivers etc.).