IEEE

WCET Estimation for CNN Inference on FPGA SoC With Multi-DPU Engines

Abstract: The Deep Learning Processor Unit (DPU) released in the official Xilinx Vitis AI toolchain stands as a commercial off-the-shelf solution tailored for accelerating convolutional neural network ...
IEEE

A Novel Hardware Accelerator of NeRF Based on Xilinx UltraScale and UltraScale+ FPGA

Abstract: Neural Radiance Fields (NeRF) has shown its superiority in various fields, including 3D reconstruction and inverse rendering. However, due to its high computational demands, NeRF typically ...