EDN

Microsemi reduces the power on PolarFire FPGA line

Microsemi Corp. has created lower-power versions of its PolarFire field-programmable gate arrays (FPGAs) and simultaneously released an updated version of its design suite that supports the new ...
Business Insider

Microsemi Collaborates with MathWorks to Deliver First Integrated FPGA-in-the-Loop Workflow for PolarFire and SmartFusion2 FPGA Development Boards

ALISO VIEJO, Calif., April 19, 2018 /PRNewswire/ -- Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, ...
Design-Reuse

Microsemi RTG4 FPGAs Become Industry's First High-Speed Signal Processing Radiation-Tolerant FPGAs to Achieve QML Class V Qualification

ALISO VIEJO, Calif., Aug. 28, 2018 -- Microsemi Corporation, a wholly owned subsidiary of Microchip Technology Inc. (Nasdaq: MCHP), today announced its RTG4™ high-speed signal processing ...
Design-Reuse

Microsemi PolarFire FPGAs Enable Smallest, Lowest Power DisplayPort Implementations with New IP from Bitec

ALISO VIEJO, Calif., July 24, 2018 -- Microsemi Corporation, a wholly owned subsidiary of Microchip Technology, Inc. (Nasdaq: MCHP), today announced the availability of Bitec's DisplayPort™ ...
Electronics Weekly

Microsemi adds to RISC-V based FPGAs

Microchip has added multi-core coherent RISC-V processors to its PolarFire FPGA family, with the intention of brings real-time deterministic asymmetric multiprocessing to Linux platforms. The ...
Electronics Weekly

Microsemi brings out flash-based FPGAs with 12.7Gbps transceivers

Microsemi has come out with a family of flash-based FPGAs with densities up to 500k LUTs with low power and low cost. Built on a 28nm SONOS flash CMOS process licensed from Cypress, the devices, ...
Business Wire

Aldec Introduces Hardware Assisted RTL Simulation Acceleration for Microchip FPGA Designs

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed-HDL language simulation and hardware-assisted verification for ASIC and FPGA designs, has introduced a HES-DVM™ simulation ...
New Electronics

HES-DVM simulation acceleration flow for Microchip FPGA designs

Aldec, an expert in mixed-HDL language simulation and hardware-assisted verification for ASIC and FPGA designs, has introduced a HES-DVM simulation acceleration flow for Microchip’s PolarFire, ...
Electronic Design

Q&A: A Closer Look at Microsemi’s Rad-Tolerant FPGAs

This file type includes high resolution graphics and schematics when applicable. Ken O'Neill, Director of Marketing, Space and Aviation, SoC Products Group, Microsemi Corp. Radiation in space can ...